• DocumentCode
    1139338
  • Title

    Stochastic wafer fabrication scheduling

  • Author

    Shen, Youxun ; Leachman, Robert C.

  • Author_Institution
    Semicond. Products Group, Agilent Technol. Inc., Fort Collins, CO, USA
  • Volume
    16
  • Issue
    1
  • fYear
    2003
  • fDate
    2/1/2003 12:00:00 AM
  • Firstpage
    2
  • Lastpage
    14
  • Abstract
    To meet the challenge of integrating uncertainty analysis into wafer fabrication scheduling, this paper proposes a stochastic dynamic programming model for scheduling new releases and bottleneck processing by stage. Based on the paradigm of stochastic linear quadratic control (SLQ), the fab scheduling model incorporates considerable analysis of uncertainties in yields and demands. The SLQ scheduling model explicitly captures the reentrant flow structure characteristic of wafer fabrication. Moreover, the SLQ scheduling model removes a major weakness in applying dynamic programming to production control by accommodating noninteger values for lead times. Embedded in the SLQ scheduling model is what the authors term a degree-2 yield distribution that subsumes most popular yield distributions in the literature. As long as the underlying system dynamics behave in a degree-2 fashion, the corresponding optimal scheduling policy turns out to be a linear control rule that is easy to compute and implement. Industrial data are used to test the effectiveness and robustness of the SLQ machinery versus the LP rolling horizon and pull heuristic methodologies. Encouraging results and valuable insights are obtained from extensive numerical experiments that show promise for successfully managing uncertainties surrounding fab scheduling.
  • Keywords
    dynamic programming; integrated circuit yield; linear quadratic control; production control; stochastic programming; uncertainty handling; bottleneck processing; linear control rule; noninteger values; reentrant flow structure; robustness; stochastic dynamic programming model; stochastic linear quadratic control; uncertainty analysis; wafer fabrication scheduling; yields; Dynamic programming; Dynamic scheduling; Fabrication; Job shop scheduling; Optimal scheduling; Processor scheduling; Production control; Semiconductor device modeling; Stochastic processes; Uncertainty;
  • fLanguage
    English
  • Journal_Title
    Semiconductor Manufacturing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0894-6507
  • Type

    jour

  • DOI
    10.1109/TSM.2002.807743
  • Filename
    1177325