• DocumentCode
    1139390
  • Title

    Ceramic packages for liquid-nitrogen operation

  • Author

    Tong, Ho-Ming ; Yeh, Helen L. ; Goldblatt, Ronald D. ; Srivastava, Kamalesh K. ; Coffin, Jeffrey T. ; Rosenberg, William D. ; Jaspal, Jasvir S.

  • Author_Institution
    IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
  • Volume
    36
  • Issue
    8
  • fYear
    1989
  • fDate
    8/1/1989 12:00:00 AM
  • Firstpage
    1521
  • Lastpage
    1527
  • Abstract
    To evaluate their compatibility for use in a liquid-nitrogen computer, metallized ceramic packages with test chips using controlled-collapse solder (Pb-Sn) technology were cycled between 30°C and liquid-nitrogen temperature. Room-temperature electrical resistance measurements were made at regular intervals of cycles to determine whether solder failure accompanied by a significant resistance increase had occurred. For the failed solder joints characterized by the highest thermal shear strain amplitude of 3.3%, it was possible to estimate the number of liquid-nitrogen cycles needed to produce the corresponding failure rate using a room-temperature solder lifetime model. Cross-sectional examination of the failed solder joints using scanning electron microscopy (SEM) and energy-dispersive X-ray analysis indicated solder cracking occurring at the solder-ceramic interface. Chip-pull tests on cycled packages yielded strengths far exceeding the minimal requirement. Mechanisms involving the formation of intermetallics are proposed to account for the observed solder fracture modes after liquid-nitrogen cycling and after chip pull. SEM examination of pulled chips in cycled packages found no apparent sign of cracking in quartz and polyimide for chip insulation
  • Keywords
    ceramics; failure analysis; fracture toughness testing; low-temperature techniques; packaging; soldering; 77 K; LNT cycling; PbSn solder; chip pull tests; controlled-collapse solder; electrical resistance; energy-dispersive X-ray analysis; failure rate; intermetallics; metallized ceramic packages; scanning electron microscopy; solder failure; solder fracture modes; solder lifetime model; solder-ceramic interface; test chips; thermal shear strain amplitude; Capacitive sensors; Ceramics; Electric resistance; Electrical resistance measurement; Metallization; Packaging; Scanning electron microscopy; Soldering; Temperature control; Testing;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.30965
  • Filename
    30965