Title :
Positive Fail-Safe Realization of Synchronous Sequential Machines
Author :
Halatsis, Constantinos ; Gaitanis, Nicholas
Author_Institution :
Digital Systems Laboratory, Computer Center, Nuclear Research Center Democritos
Abstract :
The correspondence deals with the fail-safe realization of synchronous sequential machines under the assumption that the next-state functions are in any positive form. This leads to new classes of assignments called positive fail-safe assignment´s (PFSA) The feasibility conditions of such assignments are given and systematic procedures are presented for deriving them using k-out-of-n codes.
Keywords :
Covering set; destination set; fail-safe; k-out-of-n code; positive fail-safe assignment; positive realization; realization free; sequential machines; Boolean functions; Circuit synthesis; Digital systems; Electrons; Iterative algorithms; Logic arrays; Minimization methods; Switching circuits; Testing; Covering set; destination set; fail-safe; k-out-of-n code; positive fail-safe assignment; positive realization; realization free; sequential machines;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1979.1675309
