DocumentCode :
1139884
Title :
System-level design hardening based on worst-case ASET Simulations
Author :
Boulghassoul, Y. ; Adell, P.C. ; Rowe, J.D. ; Massengill, L.W. ; Schrimpf, R.D. ; Sternberg, A.L.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Vanderbilt Univ., Nashville, TN, USA
Volume :
51
Issue :
5
fYear :
2004
Firstpage :
2787
Lastpage :
2793
Abstract :
We present experimental and simulation results on single-event transients in an analog subsystem for satellite electronic equipment. Investigations based on worst-case transient events, simulated with transistor-level circuit models, suggest design modifications for hardening.
Keywords :
aerospace computing; operational amplifiers; radiation hardening (electronics); space vehicle electronics; LM124 operational amplifiers; OP27 operational amplifiers; analog subsystem; design modifications; experimental results; satellite electronic equipment; simulation results; single-event transients; space vehicles; system-level design hardening; transistor-level circuit models; worst-case transient events; Application software; Batteries; Circuit simulation; Circuit testing; Consumer electronics; Electronic equipment testing; Operational amplifiers; Pulse amplifiers; Satellites; System-level design; ASET propagation; ASETs; Analog single-event transients; LM124 and OP27 operational amplifiers; system-level hardening by design;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.2004.835091
Filename :
1344418
Link To Document :
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