DocumentCode :
1139887
Title :
A 5.8 GHz 1 V Linear Power Amplifier Using a Novel On-Chip Transformer Power Combiner in Standard 90 nm CMOS
Author :
Haldi, Peter ; Chowdhury, Debopriyo ; Reynaert, Patrick ; Liu, Gang ; Niknejad, Ali M.
Author_Institution :
Univ. of California, Berkeley
Volume :
43
Issue :
5
fYear :
2008
fDate :
5/1/2008 12:00:00 AM
Firstpage :
1054
Lastpage :
1063
Abstract :
A fully integrated 5.8 GHz Class AB linear power amplifier (PA) in a standard 90 nm CMOS process using thin oxide transistors utilizes a novel on-chip transformer power combining network. The transformer combines the power of four push-pull stages with low insertion loss over the bandwidth of interest and is compatible with standard CMOS process without any additional analog or RF enhancements. With a 1 V power supply, the PA achieves 24.3 dBm maximum output power at a peak drain efficiency of 27% and 20.5 dBm output power at the 1 dB compression point.
Keywords :
CMOS integrated circuits; microwave amplifiers; microwave integrated circuits; power amplifiers; power integrated circuits; power transformers; power transistors; thin film transistors; CMOS; RF enhancements; efficiency 27 percent; frequency 5.8 GHz; linear power amplifier; novel on-chip transformer power combiner; push-pull power stages; size 90 nm; thin oxide transistors; voltage 1 V; CMOS process; CMOS technology; Circuit faults; Network-on-a-chip; Power amplifiers; Power combiners; Power generation; Power supplies; Radio frequency; Radiofrequency amplifiers; CMOS power amplifier; power amplifiers; power combiners;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2008.920347
Filename :
4494655
Link To Document :
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