Title :
Study of an SOI SRAM sensitivity to SEU by 3-D device Simulation
Author :
Castellani-Coulié, K. ; Sagnes, B. ; Saigné, F. ; Palau, J.-M. ; Calvet, M.-C. ; Dodd, P.E. ; Sexton, F.W.
Author_Institution :
Univ. Aix-Marseille, Marseille, France
Abstract :
Silicon on insulator static random-access memory cell sensitivity to single event upset is studied. Currents and sensitive regions are then considered. Because of the buried oxide, the main part of these results appears to be different to that for bulk technologies.
Keywords :
SRAM chips; buried layers; sensitivity; silicon-on-insulator; 3-D device simulation; SEU; SOI SRAM sensitivity; bulk technologies; buried oxide; current regions; sensitive regions; silicon on insulator; single event upset; static random-access memory cell sensitivity; Character generation; Energy exchange; Immune system; Insulation life; Isolation technology; Laboratories; MOS devices; Random access memory; Silicon on insulator technology; Single event upset; SEU; SOI; SRAM; Sensitive regions; silicon on insulator; single event upset; static random-access memory;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2004.835076
