Title :
A CMOS time to digital converter IC with 2 level analog CAM
Author :
Gerds, Eric J. ; Van der Spiegel, J. ; Van Berg, R. ; Williams, H.H. ; Callewaert, L. ; Eyckmans, W. ; Sansen, W.
Author_Institution :
Dept. of Electr. Eng., Pennsylvania Univ., Philadelphia, PA, USA
fDate :
9/1/1994 12:00:00 AM
Abstract :
A time to charge converter IC with an analog memory unit (TCCAMU) has been designed and fabricated in HP´s CMOS 1.2-μm n-well process. The TCCAMU is an event driven system designed for front end data acquisition in high energy physics experiments. The chip includes a time to charge converter, analog Level 1 and Level 2 associative memories for input pipelining and data filtering, and an A/D converter. The intervals measured and digitized range from 8-24 ns. Testing of the fabricated chip resulted in an LSB width of 107 ps, a typical differential nonlinearity of <35 ps, and a typical integral nonlinearity of <200 ps. The average power dissipation is 8.28 mW per channel. By counting the reference clock, a time resolution of 107 ps over ~1 s range could be realized
Keywords :
CMOS integrated circuits; analogue storage; analogue-digital conversion; content-addressable storage; convertors; data acquisition; mixed analogue-digital integrated circuits; nuclear electronics; 1.2 micron; 2 level analog CAM; 8 to 24 ns; 8.28 mW; A/D converter; ADC; CMOS n-well process; CMOS time to digital converter IC; analog memory unit; associative memories; data filtering; event driven system; front end data acquisition; high energy physics experiments; input pipelining; time to charge converter; Analog integrated circuits; Analog memory; Analog-digital conversion; CADCAM; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS integrated circuits; CMOS process; Computer aided manufacturing; Data acquisition;
Journal_Title :
Solid-State Circuits, IEEE Journal of
