• DocumentCode
    1140101
  • Title

    A Broadband Balanced Distributed Frequency Doubler With a Sharing Collector Line

  • Author

    Lin, Kun-You ; Huang, Jhih-Yu ; Hsieh, Chi-Kai ; Shin, Shih-Chieh

  • Author_Institution
    Dept. of Electr. Eng. & Grad. Inst. of Commun. Eng., Nat. Taiwan Univ., Taipei
  • Volume
    19
  • Issue
    2
  • fYear
    2009
  • Firstpage
    110
  • Lastpage
    112
  • Abstract
    A broadband balanced distributed frequency doubler fabricated by 0.35 mum SiGe BiCMOS technology is developed to operate from 4 to 18 GHz output frequency. This balanced doubler consists of an active balun and a distributed doubler. A sharing collector line is used in the balanced distributed doubler to reduce the chip size. This circuit exhibits a measured conversion loss of less than 8 dB and a fundamental rejection of better than 23 dB for the output frequency between 4 and 18 GHz. The chip size is 1.1times0.7 mm2.
  • Keywords
    BiCMOS integrated circuits; Ge-Si alloys; frequency multipliers; semiconductor materials; BiCMOS technology; SiGe; active balun; broadband balanced distributed frequency doubler; conversion loss; frequency 4 GHz to 18 GHz; fundamental rejection; output frequency; sharing collector line; Balanced doubler; SiGe BiCMOS; distributed doubler;
  • fLanguage
    English
  • Journal_Title
    Microwave and Wireless Components Letters, IEEE
  • Publisher
    ieee
  • ISSN
    1531-1309
  • Type

    jour

  • DOI
    10.1109/LMWC.2008.2011336
  • Filename
    4773155
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1140101