• DocumentCode
    1141041
  • Title

    Composite Parallel Counters

  • Author

    Dadda, Luigi

  • Author_Institution
    Istituto di Elettrotecnica ed Elettronica Politecnico di Milano
  • Issue
    10
  • fYear
    1980
  • Firstpage
    942
  • Lastpage
    946
  • Abstract
    A graphical representation is presented for parallel counters, i.e., multiple input combinatorial modules that count the number of inputs being in a given state (normally logic ONE).
  • Keywords
    Associative processors; carry-shower counters; digital counters; multiple input adders; parallel counter networks; parallel counters; parallel multipliers; response counters; Adders; Analog-digital conversion; Associative memory; Correlators; Counting circuits; Delay; Digital arithmetic; Logic circuits; Network synthesis; Read only memory; Associative processors; carry-shower counters; digital counters; multiple input adders; parallel counter networks; parallel counters; parallel multipliers; response counters;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1980.1675481
  • Filename
    1675481
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1141041