• DocumentCode
    1141369
  • Title

    Concurrent error detection and correction in dual basis multiplier over GF(2m)

  • Author

    Chiou, Che Wun ; Lee, Chen-Yi ; Lin, Jim-Min ; Hou, T.-W. ; Chang, Chung-Ching

  • Author_Institution
    Dept. of Comput. Sci. & Inf. Eng., Ching Yun Univ., Chung-Li
  • Volume
    3
  • Issue
    1
  • fYear
    2009
  • fDate
    2/1/2009 12:00:00 AM
  • Firstpage
    22
  • Lastpage
    40
  • Abstract
    Fault-based side-channel cryptanalysis is a useful technique against symmetrical and asymmetrical encryption/decryption algorithms. Thus, eliminating cryptographic computation errors become critical in preventing such kind of attacks. A simple way to eliminating cryptographic computation errors is to output correct or corrected ciphers. Multiplication is the most important finite field arithmetic operation in the cryptographic computations. By using time redundancy technique, a novel dual basis (DB) multiplier over Galois fields (2m) will be presented with lower space complexity and feedback-free property. Based on the proposed feedback-free DB multiplier, the DB multiplier with a concurrent error detection (CED) capability is also easily developed. Compared with the existing DB multiplier with CED capability, the proposed one saves about 90% of time-area complexity. No existing DB multiplier in the literature has concurrent error correction (CEC) capability. Based on the proposed DB multiplier, a novel DB multiplier with CEC capability is easily designed. The proposed DB multiplier with CEC capability requires only about 3% of extra space complexity and 15% of time complexity when compared with the proposed DB multiplier without CEC.
  • Keywords
    Galois fields; algebra; computational complexity; cryptography; error correction codes; fault diagnosis; GF; Galois fields; asymmetrical encryption; concurrent error detection; cryptographic computation errors; decryption algorithms; dual basis multiplier; fault-based side-channel cryptanalysis; feedback-free property; finite field arithmetic operation; time complexity;
  • fLanguage
    English
  • Journal_Title
    Circuits, Devices & Systems, IET
  • Publisher
    iet
  • ISSN
    1751-858X
  • Type

    jour

  • DOI
    10.1049/iet-cds:20080122
  • Filename
    4773284