• DocumentCode
    1141588
  • Title

    Acceptable Testing of VLSI Components Which Contain Error Correctors

  • Author

    Cliff, Rodger A.

  • Author_Institution
    NASA Goddard Space Flight Center
  • Issue
    2
  • fYear
    1980
  • Firstpage
    125
  • Lastpage
    134
  • Abstract
    If a VLSI chip is partitioned into functional units (FU´s) and redundant FU´s are added, error correcting codes may be employed to increase the yield and/or reliability of the chip. Acceptable testing is defined to be testing the chip with the error corrector functioning, thus obtaining the maximum increase in yield afforded by the error correction. The acceptable testing theorem shows that the use of coding and error correction in conjunction with acceptable testing can significantly increase the yield of VLSI chips without seriously compromising their reliability.
  • Keywords
    Error correction; Error correction codes; Fault tolerance; Integrated circuit modeling; Logic arrays; Logic testing; Reliability theory; Semiconductor memory; Space technology; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1980.1675536
  • Filename
    1675536