• DocumentCode
    1141600
  • Title

    A High-Speed Microprogrammable Digital Signal Processor Employing Distributed Arithmetic

  • Author

    Zeman, Jan ; Nagle, Troy H., Jr.

  • Author_Institution
    Institute of Telecommunications, Swiss Federal Institute of Technology
  • Issue
    2
  • fYear
    1980
  • Firstpage
    134
  • Lastpage
    144
  • Abstract
    This paper describes a general-purpose digital-signal processor which is constructed with 4 bit bipolar microprocessor slices. The signal processor is microprogrammable and contains special features which allow it to employ distributed arithmetic. Hence, the processor can achieve high sampling rates without using a hardware multiplier unit. The processor´s architecture is presented and its micro-order structure is examined. The processor wordlength is 16 bit; its basic cycle time, 300 ns; its data memory size, 2K words; its control store size, 256 × 56 bits. It consumes 48 W of power and has special address processing hardware. Experimental results with a twelfth-order digital filter are demonstrated. The signal processor is also compared with several other signal processors of its class described in the literature.
  • Keywords
    Digital arithmetic; Digital filters; Digital signal processing; Digital signal processors; Filtering; Hardware; Microprocessors; Signal design; Signal processing; Signal processing algorithms;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1980.1675537
  • Filename
    1675537