DocumentCode
1141959
Title
On the assumptions contained in semiconductor yield models
Author
Ferris-Prabhu, Albert V.
Author_Institution
IBM, Essex Junction, VT, USA
Volume
11
Issue
8
fYear
1992
fDate
8/1/1992 12:00:00 AM
Firstpage
966
Lastpage
975
Abstract
It is shown that the form of semiconductor yield models, and their predictions, are to a large extent affected by the size distribution of all defects and the spatial distribution of fatal defects. As the effects of these and other assumptions on yield models are rarely described in the literature, the author examines them and develops scaling rules for the average number of fatal defects per chip. To trace differences in the predicted yield to the various assumptions, the treatment compares a simple Poisson model with a compound Poisson model and shows that, when appropriate scaling rules are used, yield predictions of the simple Poisson model are accurate for a new product with chips with areas up to an order of magnitude larger than chips of existing products
Keywords
integrated circuit technology; probability; semiconductor device models; semiconductor technology; statistical analysis; Poisson model; fatal defects; scaling rules; semiconductor yield models; size distribution; spatial distribution; yield predictions; Analytical models; Costs; Electronics industry; Equations; Gallium arsenide; Logic design; Metallization; Predictive models; Virtual manufacturing; Yield estimation;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.149768
Filename
149768
Link To Document