Title :
Automating IEEE 1500 Core Test—An EDA Perspective
Author :
Chakravadhanula, Krishna ; Chickermane, Vivek
Author_Institution :
Cadence Design Syst., Endicott, NY, USA
Abstract :
Standardized design and test practices enable automation. This article describes a methodology and corresponding tool set that combines automated support for IEEE Std 1500 and test data compression in one. In this article, we also provide some solutions to the problem of migrating core test patterns to the SoC design.
Keywords :
IEEE standards; electronic design automation; logic design; logic testing; system-on-chip; EDA; IEEE Std 1500 core test pattern; SoC design; data compression; Automatic test pattern generation; Automatic testing; Electronic design automation and methodology; Logic testing; Performance evaluation; Permission; Pins; System testing; Test data compression; Test pattern generators; EDA; IEEE Std 1500; core test; test data compression;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2009.47
