Title :
Test Data Volume Comparison: Monolithic vs. Modular SoC Testing
Author :
Sinanoglu, Ozgur ; Marinissen, Erik Jan ; Sehgal, Anuja ; Fitzgerald, Jeff ; Rearick, Jeff
Author_Institution :
Kuwait Univ., Safat, Kuwait
Abstract :
Containing production cost is a major concern for today´s complex SoCs. One of the key contributors to production cost is test time and test data volume, for which numerous compression techniques were proposed. This article introduces a different approach to test data volume reduction, namely the use of modular test based on IEEE Std 1500 architecture, and it provides modeling, analysis, and quantification to support the proposed approach.
Keywords :
automatic test pattern generation; data compression; integrated circuit design; integrated circuit testing; system-on-chip; ATPG; IEEE standard 1500 architecture; SoC design; compression technique; modular SoC testing; monolithic SoC testing; production cost; test data volume reduction; test time; Automatic test pattern generation; Automatic testing; Controllability; Costs; Logic testing; Observability; Production; Test pattern generators; Very large scale integration; Wrapping; IEEE Std 1500; SoC testing; logic cores; modular testing; monolithic testing; test application time; test data volume;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2009.65
