DocumentCode :
1142319
Title :
Bandwidth Adaptive Hardware Architecture of K-Means Clustering for Video Analysis
Author :
Chen, Tse-Wei ; Chien, Shao-Yi
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume :
18
Issue :
6
fYear :
2010
fDate :
6/1/2010 12:00:00 AM
Firstpage :
957
Lastpage :
966
Abstract :
K-Means is a clustering algorithm that is widely applied in many fields, including pattern classification and multimedia analysis. Due to real-time requirements and computational-cost constraints in embedded systems, it is necessary to accelerate K-Means algorithm by hardware implementations in SoC environments, where the bandwidth of the system bus is strictly limited. In this paper, a bandwidth adaptive hardware architecture of K-Means clustering is proposed. Experiments show that the proposed hardware can be used in applications such as image segmentation, and it has the maximum clock speed 400-MHz and 440-K gate count with TSMC 90-nm technology. Moreover, the throughput of the proposed hardware reaches 16 dimension/cycle, and it can deal with feature vectors with different dimensions using five parallel modes to utilize the input bandwidth efficiently.
Keywords :
embedded systems; image segmentation; pattern recognition; video signal processing; K-means clustering; SoC environments; bandwidth adaptive hardware architecture; clock speed; embedded systems; image segmentation; multimedia analysis; pattern classification; pattern recognition; video analysis; Clustering methods; K-Means; hardware design; parallel architectures; pattern recognition;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2009.2017543
Filename :
5169840
Link To Document :
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