DocumentCode :
1142373
Title :
DFT Expert: designing testable VLSI circuits
Author :
Bhawmik, Sudipta ; Palchaudhuri, P.
Author_Institution :
AT&T Bell Lab., Murray Hill, NJ, USA
Volume :
6
Issue :
5
fYear :
1989
Firstpage :
8
Lastpage :
19
Abstract :
A set of expert-system modules for designing easily testable VLSI circuits called DFT Expert is described. DFT Expert operates at the register-transfer level of circuit description, classifying circuit components into data transporters (DTs) and data processors (DPs). It identifies DPs and DTs, selects a test method, configures global design for test (DFT), and generates test schedules. DFT Expert´s ability to test a practical circuit is demonstrated.<>
Keywords :
VLSI; electronic engineering computing; expert systems; integrated circuit testing; DFT Expert; circuit description; data processors; data transporters; design for testability; designing testable VLSI circuits; register-transfer level; test schedules; Automatic testing; Circuit testing; Design for testability; Expert systems; Logic testing; Programmable logic arrays; Registers; Research and development; System testing; Very large scale integration;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.43075
Filename :
43075
Link To Document :
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