A directed-graph classifier of semiconductor wafer-test patterns

A technique for training an expert system for semiconductor wafer fabrication process diagnosis is described. The technique partitions an existing set of electrically tested semiconductor wafers into groups so that all wafers within each group have similar spatial distributions of the electrical test data across selected die sites. The spatial distribution of test data from the selected die sites on each wafer is referred to as the test pattern of that wafer. A directed graph that is developed by the partitioning algorithm then efficiently classifies a new incoming wafer to one of the groups established during partitioning on the basis of its test pattern. The distribution of known processing histories of wafers within the group to which the new incoming wafer is classified provides a provisional diagnosis of the incoming wafer´s process history