Title :
Electrostatic Discharge Robustness of Si Nanowire Field-Effect Transistors
Author :
Liu, Wen ; Liou, Juin J. ; Chung, Andy ; Jeong, Yoon-Ha ; Chen, Wei-Chen ; Lin, Horng-Chih
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA
Abstract :
Electrostatic discharge (ESD) performance of N-type double-gated Si nanowire (NW) thin-film transistors is investigated, for the first time, using the transmission line pulsing technique. The ESD robustness of these devices depends on the NW dimension, number of channels, plasma treatment, and layout topology. The failure currents, leakage currents, and on-state resistances are characterized, and possible ESD protection applications of these devices for future NW field-effect-transistor-based integrated circuits are also discussed.
Keywords :
electrostatic discharge; field effect integrated circuits; field effect transistor circuits; leakage currents; nanowires; thin film transistors; N-type double-gated nanowire; NW field-effect-transistor-based integrated circuits; Si; electrostatic discharge; layout topology; leakage currents; on-state resistances; plasma treatment; silicon nanowire field-effect transistors; thin-film transistors; on-state resistance; Electrostatic discharge (ESD); failure current $I_{t2}$; nanowire (NW) field-effect transistor;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2009.2025610
