Improving power efficiency of GPGPU´s global memory by a hybrid memory approach

The GPGPU´s DRAM-based global memory consumes a significant portion of the total power of GPGPU (20%-40%). Among which, leakage power dominates the global memory power consumption (more than 70%). Using Phase Change Memory (PCM) can significantly reduce the leakage power because PCM consumes zero leakage power. However, this approach may cause performance and dynamic power overhead due to PCM´s longer access latency and higher dynamic power compared to DRAM. In this paper, we propose a hybrid global memory architecture by using both DRAM and PCM memory technologies. Such an architecture has the performance and dynamic power benefits from DRAM as well as the leakage power benefits from PCM. There are two key issues about how to reasonably design and use this hybrid memory: first, how to assign capacity between DRAM and PCM in hybrid memory; second, how to distribute data between DRAM and PCM. To address the first issue, we characterize the memory usage behavior of GPGPU benchmarks, and to solve the second problem, we present effective mechanisms to analyze the criticality of data. Through the memory usage behavior and data criticality, we assign capacity and distribute data to different parts of the hybrid memory in an efficient manner. We conduct experiments to compare the performance and power consumption of our hybrid memory with traditional GDDR5 memory. The results show that our design leads to 43% and 15% power reduction of global memory and GPGPU system, respectively.