DocumentCode
1142839
Title
Conditional-Sum Early Completion Adder Logic
Author
Martin, Norman M. ; Hufnagel, Stephen P.
Author_Institution
Applied Research Laboratories, University of Texas
Issue
8
fYear
1980
Firstpage
753
Lastpage
756
Abstract
A high-speed parallel adder of digitally represented numbers called the conditional-sum early completion adder (CSCA) will be described. The CSCA design is based on the computation of "conditional" sums, carries, and column completion detection logic.
Keywords
Addition; CSA; compute arithmetic; conditional-sum adder; end-around carry; high speed adder; Adders; Arithmetic; Bismuth; Convergence; Equations; Logic design; Addition; CSA; compute arithmetic; conditional-sum adder; end-around carry; high speed adder;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1980.1675663
Filename
1675663
Link To Document