• DocumentCode
    1142856
  • Title

    Characterization of Standard Cells for Intra-Cell Mismatch Variations

  • Author

    Sundareswaran, Savithri ; Abraham, Jacob A. ; Panda, Rajendran ; Ardelea, Alexandre

  • Author_Institution
    Freescale Semicond., Austin, TX
  • Volume
    22
  • Issue
    1
  • fYear
    2009
  • Firstpage
    40
  • Lastpage
    49
  • Abstract
    With the adoption of statistical timing across industry, there is a need to characterize all gates/cells in a digital library for delay variation (referred to as statistical characterization). Statistical characterization needs to be performed efficiently with acceptable accuracy as a function of several process and environmental parameter variations. In this paper, we propose an approach to consider intra-cell process mismatch variations to characterize a cell´s delay and output transition time (output slew) variations. A straightforward approach to address this problem is to model these mismatch variations by characterizing for each device fluctuation separately. However, the runtime complexity for such characterization becomes of the order of number of devices in the cell and the number of simulations required can easily become infeasible. We analyze the fluctuations in switching and nonswitching devices and their impact on delay variations. Using these properties of the devices, we propose a clustering approach to characterize for cell´s delay variations due to intra-cell mismatch variations. The proposed approach results in as much as 12X runtime improvement with acceptable accuracy, compared with Monte Carlo simulation. We show that this approach ensures an upper bound on the results while keeping the number of simulations for each cell independent of the number of devices.
  • Keywords
    cells (electric); semiconductor device models; semiconductor technology; cell´s delay; device fluctuation; intracell mismatch variations; output transition time; standard cells; Delay effects; Fluctuations; Jacobian matrices; Random variables; Response surface methodology; Runtime; Software libraries; Sun; Timing; Upper bound; Intra-cell variations; mismatch variations; statistical characterization;
  • fLanguage
    English
  • Journal_Title
    Semiconductor Manufacturing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0894-6507
  • Type

    jour

  • DOI
    10.1109/TSM.2008.2011666
  • Filename
    4773504