DocumentCode
1143192
Title
An Improvement of Reliability of Memory System with Skewing Reconfiguration
Author
Kanai, Takeo
Author_Institution
Department of Electrical and Computer Engineering, Lehigh University
Issue
10
fYear
1981
Firstpage
811
Lastpage
812
Abstract
In a memory system with skewing reconfiguration, a virtual memory address is encoded by an address encoder to avoid using a faulty memory area. This correspondence shows one method to improve the reliability of the address encoder by encoding a virtual memory address together with data to an error correcting code. Only a few additional gates are required for the implementation if the memory system has already employed an error correcting code.
Keywords
Computer memory; error correcting code; fault tolerance; memory reconfiguration; reliability; Computer errors; Decoding; Encoding; Error correction codes; Fault tolerance; Parity check codes; Redundancy; Semiconductor device reliability; Semiconductor memory; Computer memory; error correcting code; fault tolerance; memory reconfiguration; reliability;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1981.1675699
Filename
1675699
Link To Document