Title :
Comments on "Design of a Dynamically Programmable Logic Gate"
Author_Institution :
School of Electrical Engineering, University of Bath
Abstract :
Suarez, Chang, and Adam have recently disclosed an input-programmable logic configuration, with four input terminals to provide the specified range of function capability. Here we contrast the disclosure with an alternative line of universal logic element research, and indicate that three input terminals only are required in this alternative approach.
Keywords :
Equational logic; NP and NPN completeness; logic function classification; programmable gates; universal-logic-modules; Circuit topology; Input variables; Logic design; Logic functions; Logic gates; Programmable logic arrays; Programmable logic devices; Research and development; Equational logic; NP and NPN completeness; logic function classification; programmable gates; universal-logic-modules;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1981.1675740
