DocumentCode :
1143918
Title :
The Binary Tree as an Interconnection Network: Applications to Multiprocessor Systems and VLSI
Author :
Horowitz, Ellis ; Zorat, Alessandro
Author_Institution :
Department of Computer Science and Electrical Engineering, University of Southern California
Issue :
4
fYear :
1981
fDate :
4/1/1981 12:00:00 AM
Firstpage :
247
Lastpage :
253
Abstract :
The binary tree is a natural way to organize complex computations by a computer. For problems that can be naturally divided into a tree structure, a great deal of parallelism may be employed. In this paper we examine several aspects of the binary tree structure as it relates to both multiprocessor systems and to VISI circuit design. First, we present an algorithm for mapping an arbitrary binary tree onto the plane. An analysis shows the density of this mapping. Second, we consider the problem of routing messages within a binary tree under the assumption that certain nodes may be faulty. Finally, we analyze the binary tree´s capacity to transfer information between nodes and we compare it to the capacity of the linear array and the grid.
Keywords :
Binary trees; VLSI; multiprocessing; networks; parallelism; Application software; Binary trees; Circuit faults; Circuit synthesis; Multiprocessing systems; Multiprocessor interconnection networks; Parallel processing; Routing; Tree data structures; Very large scale integration; Binary trees; VLSI; multiprocessing; networks; parallelism;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1981.1675772
Filename :
1675772
Link To Document :
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