Comparing the Dynamic Performances of Power Hardware-in-the-Loop Interfaces

This paper presents an evaluation of two interface design solutions for power hardware-in-the-loop experiments. The evaluation is performed according to four figures of merit that focus on both the dynamic and steady-state performances of the interface systems. An analytical process is then used to both compare the different interfaces and, more importantly, to define a design procedure based on an optimization problem. The primary advantage of the proposed approach is that the figures of merits can be calculated by accounting not only for the topology of the interface but also for the structure and characteristics of the controller adopted for the interface itself.