Low-pass filter for computing the transition density in digital circuits

Estimating the power dissipation and the reliability of integrated circuits is a major concern of the semiconductor industry. Previously, we showed that a good measure of power dissipation and reliability is the extent of circuit switching activity, called the transition density (see ibid., vol. 12, no. 2, p. 310-23, 1993). However, the algorithm for computing the density in the afore-mentioned paper is very basic and does not take into account the effect of inertial delays of logic gates. Thus, as we will show in this paper, the transition density may be severely overestimated in high-frequency applications. To overcome this problem, we model the effect of gate delay on logic signals in the form of a conceptual low-pass filter module that does not allow unacceptably short logic pulses to propagate. Using a stochastic model of logic signals, we then derive the equations required to propagate the transition density through the filter. We will present experimental results that illustrate the validity and importance of these results