DocumentCode :
1144650
Title :
Speed-Efficiency-Complexity Tradeoffs in Universal Diagnosis Algorithms
Author :
Butler, Jon T.
Author_Institution :
Department of Electrical Engineering and Computer Science, Northwestern University
Issue :
8
fYear :
1981
Firstpage :
590
Lastpage :
596
Abstract :
Expressions are derived for the average number of steps. required (speed) and the average number of fault-free units replaced (efficiency) when universal diagnosis algorithms are applied to systems of various degrees of interconnection (complexity). Specifically, two algorithms proposed by Smith [4] are considered. It is shown, for example, that there is a clear tradeoff between the two algorithms; one is much faster, while the other is more efficient.
Keywords :
Diagnosis algorithms; fault diagnosis; graph model of system diagnosis; multiple faults; system reliability; test interconnections; Computer architecture; Fault diagnosis; Large-scale systems; Logic testing; Network address translation; Notice of Violation; Parallel machines; Performance evaluation; Reconfigurable logic; System testing; Diagnosis algorithms; fault diagnosis; graph model of system diagnosis; multiple faults; system reliability; test interconnections;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1981.1675845
Filename :
1675845
Link To Document :
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