Title :
SEC-DED Nonbinary Code for Fault-Tolerant Byte-Organized Memory Implemented with Quaternary Logic
Author_Institution :
Fairchild Camera and Instrument Corporation
Abstract :
Byte-organized memory requires an error control scheme which can handle errors involving one or several entire bytes. A special parallel nonbinary single error correction and double error detection SEC-DED block code is constructed by dynamic programming. This code is optimum in the sense that it lends itself to a simple and high-speed hardware implementation either in binary or in quaternary logic. A double extension field GF(22m) of the subfield GF(2m) is then introduced. As a design example, a(80,64) SED-DED code in GF(24) is constructed.
Keywords :
Byte-error correcting code; I; SEC/DED code; dynamic programming; fault-tolerant memory; multivalued Galois logic; nonbinary Hamming code; Bills of materials; Block codes; Computer errors; Costs; Dynamic programming; Error correction; Error correction codes; Fault tolerance; Hardware; Logic programming; Byte-error correcting code; I; SEC/DED code; dynamic programming; fault-tolerant memory; multivalued Galois logic; nonbinary Hamming code;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1981.1675864