DocumentCode
1144981
Title
Architecture of a Programmable Digital Signal Processor
Author
Shively, Richard R.
Author_Institution
Bell Laboratories
Issue
1
fYear
1982
Firstpage
16
Lastpage
22
Abstract
The architecture of a programmable signal processor designed at Bell Laboratories is described.
Keywords
Architecture; concurrent subprocessors; microprocessors; real-time; signal processors; Buffer storage; Costs; Data processing; Digital signal processors; Large scale integration; Microprocessors; Process design; Signal design; Signal processing; Signal processing algorithms; Architecture; concurrent subprocessors; microprocessors; real-time; signal processors;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1982.1675880
Filename
1675880
Link To Document