A quadrature digital synthesizer/mixer architecture using fine/coarse coordinate rotation to achieve 14-b input, 15-b output, and 100-dBc SFDR

This paper describes a coordinate rotation technique for implementing a quadrature digital synthesizer/mixer (QDSM). Utilizing the concept of fine/coarse decomposition, large-sized look-up tables for evaluating sine and cosine functions are avoided. Interpolation-based fine evaluation enables high-precision to be maintained without increasing the size of the tables. A prototype QDSM was implemented on a 0.51-mm² die area using a 0.25-μm CMOS technology. The prototype IC generates 15-b complex output from both 14-b complex input and an internally synthesized complex carrier with a spurious-free dynamic range (SFDR) greater than 100 dBc. It functions correctly up to 330 MHz, consuming 460 mW.