DocumentCode :
1145039
Title :
A 1-V 5.2-GHz CMOS synthesizer for WLAN applications
Author :
Leung, Gerry C T ; Luong, Howard C.
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China
Volume :
39
Issue :
11
fYear :
2004
Firstpage :
1873
Lastpage :
1882
Abstract :
A 1-V CMOS frequency synthesizer designed for WLAN 802.11a is presented. Novel circuit designs are demonstrated in the system for low-voltage applications including design of voltage-controlled oscillator and design of programmable divider. Implemented in a 0.18-μm CMOS process and operated at 1-V supply voltage, the synthesizer measures phase noise of -136 dBc/Hz at a frequency offset of 20 MHz and spur performance of less than -80 dBc at an offset of 11 MHz. The synthesizer dissipates 27.5 mW from a single 1-V supply and occupies a chip area of 1.03 mm2.
Keywords :
CMOS integrated circuits; MMIC oscillators; frequency dividers; frequency synthesizers; integrated circuit design; phase noise; voltage-controlled oscillators; wireless LAN; 0.18 micron; 1 V; 27.5 mW; 5.2 GHz; CMOS frequency synthesizer; WLAN 802.11a; WLAN applications; circuit designs; clock generation; integer-JV; low-voltage applications; phase noise; phase-locked loop; programmable divider; spur performance; voltage-controlled oscillator; CMOS process; Circuit synthesis; Frequency measurement; Frequency synthesizers; Noise measurement; Phase measurement; Semiconductor device measurement; Voltage measurement; Voltage-controlled oscillators; Wireless LAN; Clock generation; PLL; VCO; WLAN; integer- $N$; low power; low voltage; oscillator; phase-locked loop; receiver; synthesizer; transceiver;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2004.835830
Filename :
1347318
Link To Document :
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