Reducing measurement uncertainty in a DSP-based mixed-signal test environment without increasing test time

Noise, especially clock jitter effects, in a DSP-based mixed-signal test system severely limits its measurement accuracy. This is especially acute in high-frequency sampling systems. This paper illustrates an efficient method to improve measurement accuracy and precision by reducing the uncertainty of a DSP-based measurement without an increase in test time. A new digitizer architecture is introduced. The digitizer was fabricated in a 0.18-/spl mu/m CMOS process. Experimental results were obtained validating the proposed technique.