Title :
Logic simulation engines in Japan
Author :
Takasaki, Shigeru ; Hirose, Fumiyasu ; Yamada, Akihiko
Author_Institution :
NEC Corp., Tokyo, Japan
Abstract :
A description is given of HAL II and SP, ultra-high-speed logic simulation engines for use in verifying large computer logic designs. Both use parallel processor architecture with a maximum configuration of 64 processors. The resulting simulation speed is a thousand times faster than that of conventional software logic simulators run on a mainframe. HAL II and SP, which can simulate a system with several million gates, have been used successfully in the design of large digital systems for logic simulation.<>
Keywords :
logic CAD; HAL II; Japan; SP; large computer logic designs; large digital systems; logic simulation engines; parallel processor architecture; Computational modeling; Computer errors; Computer simulation; Delay; Engines; Hardware; Logic design; Supercomputers; System testing; Very large scale integration;
Journal_Title :
Design & Test of Computers, IEEE
