DocumentCode :
1145241
Title :
Probability-based approach to rectilinear Steiner tree problems
Author :
Chen, Chunhong ; Zhao, Jiang ; Ahmadi, Majid
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Windsor, Ont., Canada
Volume :
10
Issue :
6
fYear :
2002
Firstpage :
836
Lastpage :
843
Abstract :
The rectilinear Steiner tree (RST) problem is of essential importance to the automatic interconnect optimization for VLSI design. In this paper, we present a class of probability-based approaches toward the best solutions under statistical sense and show their performance in comparison with the state-of-the-art algorithm. Experiments conducted on both small- and large-size problems indicate that the proposed approaches lead to promising results in terms of wire length and/or CPU time. The potential advantages with our technique are also discussed for further applications.
Keywords :
VLSI; circuit layout CAD; circuit optimisation; integrated circuit interconnections; integrated circuit layout; probability; trees (mathematics); CPU time; IC layout; VLSI design; VLSI interconnect optimization; automatic interconnect optimization; probability-based approach; rectilinear Steiner tree problems; wire length; Costs; Councils; Design optimization; Pins; Probability; Signal design; Topology; Tree data structures; Very large scale integration; Wire;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2002.808463
Filename :
1178853
Link To Document :
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