DocumentCode
1146086
Title
Analysis of Multiprocessors with Private Cache Memories
Author
Patel, Janak H.
Author_Institution
Department of Electrical Engineering and the Coordinated Science Laboratory, University of Illinois
Issue
4
fYear
1982
fDate
4/1/1982 12:00:00 AM
Firstpage
296
Lastpage
304
Abstract
This paper presents an approximate analytical model for the performance of multiprocessors with private cache memories and a single shared main memory. The accuracy of the model is compared with simulation results and is found to be very good over a broad range of parameters. The parameters of the model are the size of the multiprocessor, the size and type of the interconnection network, the cache miss-ratio, and the cache block transfer time. The analysis is extended to include several different read/write policies such as write-through, load-through, and buffered write-back. The analytical technique presented is also applicable to the performance of interconnection networks under block transfer mode.
Keywords
Cache memories; crossbar; delta networks; interconnection networks; multiprocessors; parallel memories; performance analysis; Analytical models; Cache memory; Costs; Hardware; Multiprocessor interconnection networks; Performance analysis; Pins; Switches; Traffic control; Very large scale integration; Cache memories; crossbar; delta networks; interconnection networks; multiprocessors; parallel memories; performance analysis;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1982.1675995
Filename
1675995
Link To Document