Title :
Error Tolerant Design of Multivalued Logic Functions
Author_Institution :
Department of Electrical Engineering, Louisiana State University
fDate :
6/1/1982 12:00:00 AM
Abstract :
The effect of component errors on the behavior of polylogic circuits is considered. A design procedure which minimizes these effects is developed. An example design exhibiting improved performance is presented.
Keywords :
Error tolerance; multivalued logic; polylogic; statistical design; switching functions; Decoding; Error correction codes; Fabrication; Inspection; Logic circuits; Multivalued logic; Process design; Uncertainty; Very large scale integration; Viterbi algorithm; Error tolerance; multivalued logic; polylogic; statistical design; switching functions;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1982.1676039
