New test structure for nanometer-level overlay and feature-placement metrology

Author

Cresswell, M.W. ; Allen, Richard A. ; Linholm, Loren W. ; Ellenwood, Colleen H. ; Penzes, William B. ; Teague, E.Clayton

Author_Institution

Div. of Semicond. Electron. & Div. of Precision Eng., Nat. Inst. of Stand. & Technol., Gaithersburg, MD, USA

Volume

7

Issue

3

fYear

1994

fDate

8/1/1994 12:00:00 AM

Firstpage

266

Lastpage

271

Abstract

A new electrical test structure for overlay measurement has been evaluated by replicating arrays of its complementary components from two different photomasks into a conducting film on a quartz substrate. The features resulting from images projected from the first mask were used as a reference grid which was calibrated by the NIST line-scale interferometer. A first subset of the relative placements of the images projected from the second mask, which were derived from the electrical overlay measurements and the reference grid, agreed to within 13 nm with corresponding measurements made directly by the line-scale interferometer over distances up to 13.5 mm. A second comparison made at another substrate location indicated that gradients of projected feature linewidths across the exposure site may need to be measured, and corrected for, in the electrical extraction of overlay

Keywords

integrated circuit testing; light interferometry; lithography; masks; monolithic integrated circuits; NIST line-scale interferometer; electrical extraction; electrical test structure; feature linewidths; feature-placement metrology; nanometer-level overlay; overlay measurement; photomasks; reference grid; substrate location; Circuit testing; Conductive films; Electric variables measurement; Lithography; Materials testing; Metrology; NIST; Nanostructures; Substrates; System testing;

fLanguage

English

Journal_Title

Semiconductor Manufacturing, IEEE Transactions on

Publisher

ieee

ISSN

0894-6507

Type

jour

DOI

10.1109/66.311328

Filename

311328