Title :
Watchdog Processors and Structural Integrity Checking
Author_Institution :
Center for Reliable Computing, Computer Systems Laboratory, Departments of Electrical Engineering and Computer Science, Stanford University
fDate :
7/1/1982 12:00:00 AM
Abstract :
The use of watchdog processors in the implementation of Structural Integrity Checking (SIC) is described. A model for ideal SIC is given in terms of formal languages and automata. Techniques for use in implementing SIC are presented. The modification of a Pascal compiler into an SIC Pascal preprocessor is summarized.
Keywords :
Control flow; Pascal; error detection; structural integrity checking (SIC); structured programming; watchdog processor; Circuit faults; Circuit testing; Computer errors; Electrical fault detection; Error correction; Fault detection; Hardware; Silicon carbide; Software testing; Very large scale integration; Control flow; Pascal; error detection; structural integrity checking (SIC); structured programming; watchdog processor;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1982.1676066
