DocumentCode :
1146838
Title :
Investigation and modeling of stress effects on the formation of cobalt salicide
Author :
Hsu, Y.L. ; Fang, Y.K. ; Fang, S.J. ; Chu, P. ; Yens Ho
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Volume :
26
Issue :
9
fYear :
2005
Firstpage :
613
Lastpage :
615
Abstract :
This letter studies resistance variations of the Co salicide interconnect accompanied by various surrounding in a sub-0.13-μm CMOS technology. Our analysis shows that, during the salicidation processes, the diffusion of Co atoms and thus salicide thickness and forms of Co salicide layer are greatly affected by the stresses from surrounding structures. Moreover, variations in resistance among the various structures could exceed 100%. Thus, these stress effects were analyzed in detail based on transmission electron microscopy micrographs of Co salicide layers accompanied by four different surrounding structures.
Keywords :
CMOS integrated circuits; cobalt compounds; electric resistance; integrated circuit interconnections; stress effects; transmission electron microscopy; 0.13 micron; CMOS; Co salicide interconnect; CoSi/sub 2/; atomic diffusion; cobalt salicide; micrographs; resistance variations; salicidation processes; salicide thickness; stress effects; transmission electron microscopy; Atomic layer deposition; CMOS technology; Cobalt; Isolation technology; Microelectronics; Semiconductor device modeling; Silicides; Silicon; Stress; Transmission electron microscopy; CMOS; Co salicide; STI; stress; transmission electron microscopy (TEM) micrographs;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2005.853647
Filename :
1498975
Link To Document :
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