DocumentCode
1146946
Title
Top-gate TFTs using 13.56 MHz PECVD microcrystalline silicon
Author
Czang-Ho Lee ; Striakhilev, D. ; Sheng Tao ; Nathan, A.
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Waterloo, Ont., Canada
Volume
26
Issue
9
fYear
2005
Firstpage
637
Lastpage
639
Abstract
Top-gate thin-film transistors (TFTs) with microcrystalline silicon (μc-Si) channel layers deposited using standard 13.56 MHz plasma-enhanced chemical vapor deposition were fabricated at a maximum processing temperature of 250/spl deg/C. The TFTs employ amorphous silicon nitride (a-SiN) as the gate dielectric layer. The 80-nm-thick μc-Si channel layer showed a dark conductivity of the order of 10/sup -7/ S/cm and a crystalline volume fraction of over 80%. The μc-Si TFTs showed a field effect mobility of 0.85 cm2/V/spl middot/s, a threshold voltage of 4.8 V, a subthreshold slope of 1 V/dec, and an ON/OFF current ratio of /spl sim/10/sup 7/. More importantly, the TFTs were very stable under gate bias stress, offering promise for organic light-emitting display (OLED) applications.
Keywords
optical materials; organic light emitting diodes; plasma CVD; silicon compounds; thin film transistors; 13.56 MHz; 250 C; 4.8 V; 80 nm; OLED; PECVD microcrystalline silicon; SiN; amorphous silicon nitride; channel layer; crystalline volume fraction; dark conductivity; gate bias stress; gate dielectric layer; organic light-emitting display; plasma-enhanced chemical vapor deposition; top-gate TFT; top-gate thin-film transistor; Amorphous silicon; Chemical vapor deposition; Conductivity; Crystallization; Dielectrics; Plasma chemistry; Plasma materials processing; Plasma temperature; Thin film transistors; Threshold voltage; Amorphous silicon nitride (a-SiN); microcrystalline silicon; plasma-enhanced chemical vapor deposition (PECVD); thin film transistors (TFTs);
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2005.853670
Filename
1498983
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