A new analytical model of SRAM cell stability in low-voltage operation

Author

Ichikawa, Tsutomu ; Sasaki, Masayoshi

Author_Institution

Device Dev. Dept., Sony Corp., Kanagawa, Japan

Volume

43

Issue

1

fYear

1996

fDate

1/1/1996 12:00:00 AM

Firstpage

54

Lastpage

61

Abstract

A new analytical model of MOS SRAM cell stability is presented as the measure of cell stability in low-voltage operation. The model individually deals with transistor parameters together with parasitic resistance in the cell. Mutual effects of cell-parameter variation on the lower limit of supply voltage is clarified for the first time. The V _CCmin´s of a conventional cell and a split wordline (SWL) cell are evaluated under the consideration of fabricated cell patterns, and superiority of the SWL cell is shown. This superiority is mainly attributed to its simple layout of the MOSFETs in the cell rather than its symmetrical layout

Keywords

MOS memory circuits; SRAM chips; cellular arrays; circuit stability; integrated circuit modelling; MOS SRAM cell; SRAM cell stability; analytical model; fabricated cell patterns; low-voltage operation; parasitic resistance; split wordline cell; transistor parameters; Analytical models; Breakdown voltage; Circuit stability; Electrical resistance measurement; Inverters; Low voltage; MOSFETs; Power dissipation; Random access memory; Stability analysis;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.477593

Filename

477593