DocumentCode :
1147617
Title :
An Easily Testable Design of Programmable Logic Arrays for Multiple Faults
Author :
Saluja, Kewal K. ; Kinoshita, Kozo ; Fujiwara, Hideo
Author_Institution :
Department of Electrical and Computer Engineering, University of Newcastle
Issue :
11
fYear :
1983
Firstpage :
1038
Lastpage :
1046
Abstract :
In this paper, the problem of fault detection for multiple faults in programmable logic arrays (PLA´s) is discussed. An easily testable design of PLA´s has been proposed which has the following properties: 1) for a PLA with n inputs, m product terms, there exists a test set such that the test patterns do not depend on the function realized by the PLA; 2) the number of tests to detect multiple stuck type and cross point faults is m(2n + 1) + 4n + 4; 3) the number of additional pins for the testable design is 3; 4) the design philosophy is compatible with the built-in-testing approaches.
Keywords :
Cross-point faults; easily testable design; multiple faults; programmable logic arrays; stuck-type faults; Circuit faults; Circuit testing; Complexity theory; Electronic equipment testing; Fault detection; Logic design; Logic testing; Pins; Programmable logic arrays; Very large scale integration; Cross-point faults; easily testable design; multiple faults; programmable logic arrays; stuck-type faults;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1983.1676154
Filename :
1676154
Link To Document :
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