Title :
A Faster 8-Bit Carry Circuit
Author_Institution :
Department of Mathematical Sciences, Ball State University
Abstract :
A modification of the Chen-Kuck 8-bit carry circuit is presented with one less gate delay and a proof is given that this is the best possible time. The corresponding results for longer length circuits are summarized.
Keywords :
Binary addition; combinational circuit synthesis; component counts; computer arithmetic; fast adders; parallel adders; time delays; Adders; Circuit synthesis; Combinational circuits; Coupling circuits; Delay effects; Digital arithmetic; Polynomials; Binary addition; combinational circuit synthesis; component counts; computer arithmetic; fast adders; parallel adders; time delays;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1983.1676188
