DocumentCode
1148319
Title
A low latency asynchronous arbitration circuit
Author
Yakovlev, Alexandre ; Petrov, Alexei ; Lavagno, Luciano
Author_Institution
Dept. of Comput. Sci., Newcastle upon Tyne Univ., UK
Volume
2
Issue
3
fYear
1994
Firstpage
372
Lastpage
377
Abstract
We present an asynchronous circuit for an arbiter cell that can be used to construct cascaded multiway arbitration circuits. The circuit is completely speed-independent. It has a short response delay at the input request-grant handshake link due to both a) the propagation of requests in parallel with starting arbitration and b) the concurrent resetting of request-grant handshakes in different cascades of a request-grant propagation chain.<>
Keywords
resource allocation; sequential circuits; arbiter cell; asynchronous arbitration circuit; cascaded multiway arbitration circuits; concurrent resetting; conflict resolution; input request-grant handshake link; latency; modular control logic; parallel request propagation; request-grant propagation chain; resource allocation; response delay; signal transition graphs; Circuit faults; Circuit testing; Delay; Design for testability; Discrete event simulation; Fault detection; Latches; System testing; Very large scale integration;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/92.311648
Filename
311648
Link To Document