DocumentCode :
1148476
Title :
An 8.1 mW, 82 dB Delta-Sigma ADC With 1.9 MHz BW and 
98 dB THD
Author :
Lee, Kyehyung ; Miller, Matthew R. ; Temes, Gabor C.
Author_Institution :
Conexant Syst. Inc., Newport Beach, CA, USA
Volume :
44
Issue :
8
fYear :
2009
Firstpage :
2202
Lastpage :
2211
Abstract :
A switched-capacitor low-distortion 15-level delta-sigma ADC is described. It achieves third-order noise shaping with only two integrators by using quantization noise coupling. Realized in a 0.18 mum CMOS technology, it provides 81 dB SNDR, 82 dB dynamic range, and -98 dB THD in a signal bandwidth of 1.9 MHz. It dissipates 8.1 mW with a 1.5 V power supply (analog power 4.4 mW, digital power 3.7 mW). Its figure-of-merit is 0.25 pJ/conversion-step, which is among the best reported for discrete-time delta-sigma ADCs in wideband applications.
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; delta-sigma modulation; quantisation (signal); CMOS technology; delta-sigma ADC; discrete-time ADC; frequency 1.9 MHz; low-distortion ADC; power 3.7 mW; power 4.4 mW; power 8.1 mW; quantization noise coupling; size 0.18 mum; switched-capacitor ADC; third-order noise shaping; voltage 1.5 V; wideband applications; Bandwidth; CMOS technology; Circuit topology; Dynamic range; Filters; Linearity; Noise shaping; Quantization; Semiconductor device noise; Signal processing; Delta-sigma ADC; low-distortion ADC; quantization noise coupling;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2009.2022298
Filename :
5173756
Link To Document :
