A Hierarchical Description Model for Microcode

In the paper, a structured and formal way to define microcode and to model a microprogrammed machine in terms of microoperations and their collection in microinstructions is proposed. It is characterized particularly by the hierarchical subdivision of microcode modeling, associated with the introduction of proper formalism to describe each level and the representation of both hardware timing and resource specification (with respect to their hardware characteristics and utilization in the architecture) in a completely machine-independent way.