• DocumentCode
    1148778
  • Title

    Accurate and efficient modeling of SOI MOSFET with technology independent neural networks

  • Author

    Hatami, S. ; Azizi, M.Y. ; Bahrami, H.R. ; Motavalizadeh, D. ; Afzali-Kusha, A.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Tehran, Iran
  • Volume
    23
  • Issue
    11
  • fYear
    2004
  • Firstpage
    1580
  • Lastpage
    1587
  • Abstract
    This paper presents neural network (NN) approaches for modeling the I-V characteristics of silicon-on-insulator MOSFETs. The modeling approach is technology independent, fast, and accurate, which makes it suitable for circuit simulators. In the model, two different NN architectures, namely, multilayer perceptron and generalized radial basis function, are used and compared. To increase the training efficiency of the NN, both modular and region partitioning methods have been proposed and utilized. In addition, two approaches for obtaining the transconductance and output conductance of the device are discussed. The first approach makes use of an NN for the conductances, while the second uses the numerical differentiation of the I-V results. To confirm the accuracy of the model, the drain-current characteristics as well as conductances obtained by the model are compared to the simulation data for the points where the NNs are not trained. The comparison shows excellent agreements with relative errors of around 1% over a wide range of drain and gate voltages as well as channel lengths and widths.
  • Keywords
    MOSFET; circuit simulation; multilayer perceptrons; radial basis function networks; semiconductor device models; silicon-on-insulator; I-V characteristics; circuit simulation; circuit simulators; drain-current characteristics; generalized radial basis function; modular partitioning methods; multilayer perceptron; neural network modeling; numerical differentiation; region partitioning methods; silicon-on-insulator MOSFET; technology independent modeling; unified modeling; Circuit simulation; MOSFET circuits; Multilayer perceptrons; Neural networks; Paper technology; Parasitic capacitance; Silicon on insulator technology; Table lookup; Transconductance; Voltage; 65; Circuit simulation; FD; NN; PD; SOI; fully depleted; modeling; neural network; partially depleted; silicon-on-insulator; technology independent modeling; unified modeling;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2004.836725
  • Filename
    1350884