Title :
Designing a reliability demonstration test on a lithography expose tool using Bayesian techniques
Author :
Villacourt, Mario ; Mahaney, Michael
Author_Institution :
Sematech, Austin, TX, USA
fDate :
9/1/1994 12:00:00 AM
Abstract :
Once a wafer fabrication processing tool has demonstrated its potential for meeting process specifications, the focus of tool development broadens to include an assessment of the tool´s ability to deliver the specified process repeatedly and reliably over time. Process stability and equipment reliability are assessed in a reliability demonstration test, termed a “marathon” in the SEMATECH Qualification Plan. Statistics plays a role in the design and interpretation of such testing by supplying the means for 1) specifying test length using the stated reliability goal and prior data on similar tools, and 2) constructing a confidence interval for the estimate of reliability resulting from the test. The design and analysis of a marathon test for a world-class lithography expose tool will be used as an illustration of how statistical methods can be used to advantage in assessing the reliability of a complex system. Most marathon tests conducted at SEMATECH require test times of 500 h or more, resulting in significant test costs. The motivation to reduce test costs without increasing the risk of an incorrect decision is strong. One promising approach to reducing test costs is to incorporate prior equipment performance explicitly in the design of a reliability demonstration test. Previous history and data are usually available from suppliers or users of the equipment to be tested. This paper describes our efforts to reduce test costs for a SEMATECH-sponsored lithography expose tool development project by incorporating past history into the planning of a reliability demonstration test. The statistical method used in this example has been discussed extensively in the statistical literature as a Bayesian application, but it is not widely known to equipment development engineers
Keywords :
Bayes methods; lithography; reliability; semiconductor process modelling; statistical analysis; Bayesian techniques; SEMATECH Qualification Plan; confidence interval; equipment reliability; lithography expose tool; past history; process stability; reliability demonstration test; statistical methods; test costs; tool development; wafer fabrication processing tool; Bayesian methods; Costs; Fabrication; History; Lithography; Qualifications; Stability; State estimation; Statistical analysis; System testing;
Journal_Title :
Components, Packaging, and Manufacturing Technology, Part A, IEEE Transactions on