Title :
Memory Package Error Detection and Correction
Author :
Varanasi, M.R. ; Rao, T.R.N. ; Pham, Son
Author_Institution :
Department of Computer Science, University of South Florida
Abstract :
Single error correcting-double error detecting (SEC-DED) codes have been successfully used in computer memories for reliability. In the present-day technology of very large scale integration storage arrays bit error correction as well as byte error detection/byte error correction become extremely important. We devise here classes of cyclic codes with generator of the form (xb -1) p(x) for some suitable irreducible polynomial p(x) which provide 1) single byte error correction (SBEC), and 2) single error correction, double error detection, and byte error detection (SEC-DED-BED) codes. The codes have high information rate and are easy to implement. This general class of codes combines elegantly the results of several researchers and in some cases extends their results.
Keywords :
Byte error detection and correction; package errors; Clocks; Computer architecture; Computer errors; Displays; Error correction; Error correction codes; Microprocessors; Packaging; Prefetching; Statistics; Byte error detection and correction; package errors;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1983.1676338